entity extensorSinal is
	port (
		entrada : in bit_vector (15 downto 0);
		saida : out bit_vector (31 downto 0)
	);
end extensorSinal;

architecture arc_extensorSinal of extensorSinal is

begin

	process (entrada)
	
		variable resultado : bit_vector (31 downto 0);
		
		begin
			resultado(15 downto 0) := entrada(15 downto 0);
			if (entrada(15) = '1') then
				resultado(31 downto 16) := "1111111111111111";
				
			else
				resultado(31 downto 16) := "0000000000000000";
		end if;
		
			saida <= resultado;
	end process;
end arc_extensorSinal;